The complete-bridge converter
A full-bridge converter gives an environment friendly resolution for remoted energy conversion (Determine 1). Inside this topology, the selection of management technique will have an effect on the general efficiency of the converter. Most engineers solely think about a hard-switched full bridge (HSFB) or a phase-shifted full bridge (PSFB). On this energy tip, I’ll display a easy modification to a pulse width modulation (PWM)-controlled full bridge that may enhance effectivity by reaching zero-voltage switching (ZVS) and remove the resonant ringing on the transformer windings.
Determine 1 An instance of a synchronous HSFB converter energy stage. Supply: Texas Devices
The HSFB
An HSFB converter makes use of two output indicators (OUTA and OUTB) which can be 180 levels out of part to manage the diagonal pair of FETs on the primary-side bridge, proven in Determine 1. The controller permits three states for the primary-side FETs: OUTA excessive and OUTB low, OUTB excessive and OUTA low, and each OUTA and OUTB low. To keep up regulation, the controller modulates the ratio of time spent in every state.
Determine 2 exhibits (from backside to high) the OUTA and OUTB indicators, the switch-node voltages on both sides of the first bridge, and the first winding present. The change nodes return to half of the enter voltage throughout the lifeless time when each OUTA and OUTB are low.
Determine 2 Typical configuration for driving reverse FETs on the first aspect (1 µs/div). Supply: Texas Devices
When no primary-side FETs are on throughout the lifeless time, the secondary present will proceed to freewheel by the synchronous rectifiers. Presently, leakage vitality saved on the first aspect resonates with the output capacitance of the primary-side FETs, creating a big leakage spike when both OUTA or OUTB go low. This resonance impacts all 4 FETs on the first aspect. Determine 3 exhibits how giant the leakage spike can get. In apply, a big leakage spike might require you to make use of higher-voltage parts.
Determine 3 Main switching nodes with a standard configuration (400 ns/div). Supply: Texas Devices
Another strategy with complementary logic
An alternate strategy is to manage the first FETs with complementary logic on every half of the bridge. On this technique, PWM excessive turns the high-side FET on, and PWM low turns the low-side FET on. Determine 4 exhibits a diagram utilizing this strategy.
Determine 4 An instance of a synchronous ZVS full-bridge converter energy stage. Supply: Texas Devices
Determine 5 exhibits the PWM, switch-node voltages and first present for this strategy. With complementary indicators on both sides of the first bridge, each low-side FETs are actually on throughout the lifeless time. This allows the first present to proceed to freewheel by the 2 low-side FETs throughout what was the lifeless time within the standard strategy.
Determine 5 Complementary PWMs for driving FETs on the first aspect (1 µs/div). Supply: Texas Devices
The freewheeling present on the first aspect has many advantages. First, the primary-side FETs obtain ZVS. Determine 6 exhibits the first change nodes and PWM logic for one aspect of the complete bridge throughout ZVS occasions. The drain-to-source voltage falls to zero earlier than the introduction of the gate-drive sign, which signifies ZVS.
Determine 6 Main switching nodes with complementary PWM configuration (400 ns/div). Supply: Texas Devices
One other profit is much less noise all through the converter. The big leakage spike and resonant ringing are eradicated when going from the first switch-node waveforms in Determine 3 to Determine 6. The secondary rectifier additionally has lowered noise after altering the first to get ZVS.
Determine 7 compares the drain-to-source voltage of the secondary rectifiers for each design choices. The HSFB variation has noticeably extra ringing that wants a snubber to mitigate stress on the expense of decreased total system effectivity. Altering to ZVS on the first results in much less ringing on the secondary FET. There may be nonetheless a leakage spike current, nevertheless for this case a diode clamping circuit is extra appropriate than a snubber.
Determine 7 Typical configuration (400 ns/div) (left); utilizing complementary PWM indicators (1.00 µs/div) (proper). Supply: Texas Devices
A modified HSFB reference design
The introduction of ZVS alone gives an effectivity enhance throughout loading situations. Determine 8 compares a modified HSFB reference design, the “100W, 5V Output Onerous-Switched Full-Bridge Converter Reference Design for 100kRad Purposes”, that makes use of ZVS logic on the first aspect to the preliminary information that was an HSFB. The logic to the first FETs was the one change; optimizations to the primary-side FET driver and enhancements to the secondary-side safety circuit would additional enhance the advantages of this strategy.
Determine 8 The entire energy loss versus output energy for standard (TI HSFB reference design revision B) and PWM (modified board) configurations. Supply: Texas Devices
Utilizing complementary logic
Utilizing complementary logic on a full-bridge converter can allow the first FETs to attain ZVS. This strategy has many advantages for system effectivity, and the strategy is straightforward to implement.
In check circumstances, a normal synchronous full-bridge converter solely wants the logic adjusted to generate the complementary indicators. You may make this adjustment by utilizing a logic NOR gate; alternately, some drivers such because the Texas Devices TPS7H6003-SP gate driver used within the HSFB reference design have a PWM mode the place a single enter sign drives the high-side FET when the sign is excessive, and drives the low-side FET when the sign is low. As you’ll be able to see, this refined change in management logic pays massive dividends in system efficiency.
John Dorosa is a Methods Engineer in Texas Instrument’s Energy Design Companies group centered on industrial and aerospace purposes. Since becoming a member of the group in 2017 John has developed over 100 distinctive SMPS reference design boards to fulfill customized energy necessities. His work covers a broad vary of non-isolated and remoted topologies that had been optimized for a couple of milliwatts to 500 watts. He acquired a Bachelor of Science in electrical engineering from Michigan State College in East Lansing, MI.
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